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PIC16F1526 Datasheet(PDF) 65 Page - Microchip Technology

Part # PIC16F1526
Description  64-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  354 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F1526 Datasheet(HTML) 65 Page - Microchip Technology

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 2011 Microchip Technology Inc.
Preliminary
DS41458A-page 65
PIC16(L)F1526/27
TABLE 5-2:
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
TABLE 5-3:
SUMMARY OF CONFIGURATION WORD WITH CLOCK SOURCES
REGISTER 5-2:
OSCSTAT: OSCILLATOR STATUS REGISTER
R-1/q
U-0
R-q/q
R-0/q
U-0
U-0
R-0/0
R-0/q
SOSCR
—
OSTS
HFIOFR
—
—
LFIOFR
HFIOFS
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
q = Conditional
bit 7
SOSCR:
Secondary Oscillator Ready bit
If SOSCEN = 1:
1
= Secondary oscillator is ready
0
= Secondary oscillator is not ready
If SOSCEN = 0:
1 =
Timer1 clock source is always ready
bit 6
Unimplemented:
Read as ‘0’
bit 5
OSTS:
Oscillator Start-up Time-out Status bit
1
= Running from the clock defined by the FOSC<2:0> bits of the Configuration Word 1
0
= Running from an internal oscillator (FOSC<2:0> = 100)
bit 4
HFIOFR:
High-Frequency Internal Oscillator Ready bit
1
= HFINTOSC is ready
0
= HFINTOSC is not ready
bit 3-2
Unimplemented:
Read as ‘0’
bit 1
LFIOFR:
Low-Frequency Internal Oscillator Ready bit
1
= LFINTOSC is ready
0
= LFINTOSC is not ready
bit 0
HFIOFS:
High-Frequency Internal Oscillator Stable bit
1
= HFINTOSC 16 MHz Oscillator is stable and is driving the INTOSC
0
= HFINTOSC 16 MHz is not stable, the 12 MHz Start-up Oscillator is driving INTOSC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
OSCCON
—
IRCF<3:0>
—SCS<1:0>
64
OSCSTAT
SOSCR
—
OSTS
HFIOFR
—
—
LFIOFR
HFIOFS
65
PIE2
OSFIE
TMR5GIE
TMR3GIE
—
BCL1IE
TMR10IE
TMR8IE
CCP2IE
83
PIR2
OSFIF
TMR5GIF
TMR3GIF
—
BCL1IF
TMR10IF
TMR8IF
CCP2IF
85
T1CON
TMR1CS<1:0>
T1CKPS<1:0>
SOSCEN
T1SYNC
—
TMR1ON
165
Legend:
— = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.
Name
Bits
Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3
Bit 10/2
Bit 9/1
Bit 8/0
Register
on Page
CONFIG1
13:8
—
FCMEN
IESO
CLKOUTEN
BOREN<1:0>
—
46
7:0
CP
MCLRE
PWRTE
WDTE<1:0>
FOSC<2:0>
Legend:
— = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.



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