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PIC16F1526 Datasheet(PDF) 86 Page - Microchip Technology |
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PIC16F1526 Datasheet(HTML) 86 Page - Microchip Technology |
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86 / 354 page ![]() PIC16(L)F1526/27 DS41458A-page 86 Preliminary 2011 Microchip Technology Inc. 7.6.7 PIR2 REGISTER The PIR2 register contains the interrupt flag bits, as shown in Register 7-7. Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit, GIE, of the INTCON register. User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. REGISTER 7-7: PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2 R/W-0/0 R/W-0/0 R/W-0/0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 OSFIF TMR5GIF TMR3GIF — BCL1IF TMR10IF TMR8IF CCP2IF bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 OSFIF: Oscillator Fail Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending bit 6 TMR5GIF: Timer5 Gate Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending bit 5 TMR3GIF: Timer3 Gate Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending bit 4 Unimplemented: Read as ‘0’ bit 3 BCL1IF: MSSP1 Bus Collision Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending bit 2 TMR10IF: Timer10 to PR10 Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending bit 1 TMR8IF: Timer8 to PR8 Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending bit 0 CCP2IF: CCP2 Interrupt Flag bit 1 = Interrupt is pending 0 = Interrupt is not pending |
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