PIC16F1526 datasheet(95/354 Pages) MICROCHIP

95 / 354 page

 2011 Microchip Technology Inc.

Preliminary

DS41458A-page 95

PIC16(L)F1526/27

9.0

LOW DROPOUT (LDO)

VOLTAGE REGULATOR

The PIC16F1526/27 has an internal Low Dropout

Regulator (LDO) which provides operation above 3.6V.

The LDO regulates a voltage for the internal device

logic while permitting the VDD and I/O pins to operate

at a higher voltage. There is no user enable/disable

control available for the LDO, it is always active. The

PIC16LF1526/27 operates at a maximum VDD of 3.6V

and does not incorporate an LDO.

A device I/O pin may be configured as the LDO voltage

output, identified as the VCAP pin. Although not

required, an external low-ESR capacitor may be con-

nected to the VCAP pin for additional regulator stability.

The VCAPEN bit of Configuration Word 2 enables the

VCAP pin. Refer to Table 9-1.

On power-up, the external capacitor will load the LDO

voltage regulator. To prevent erroneous operation, the

device is held in Reset while a constant current source

charges the external capacitor. After the cap is fully

charged, the device is released from Reset. For more

information on recommended capacitor values and the

constant current rate, refer to the LDO Regulator

Characteristics Table in Section 25.0 “Electrical

Specifications”

TABLE 9-2:

SUMMARY OF CONFIGURATION WORD WITH LDO

TABLE 9-1:

VCAPEN SELECT BIT

VCAPEN

RF0

No Vcap

Name

Bits

Bit -/7

Bit -/6

Bit 13/5

Bit 12/4

Bit 11/3

Bit 10/2

Bit 9/1

Bit 8/0

on Page

CONFIG2

13:8

—

LVP

DEBUG

LPBOR

BORV

STVREN

—

7:0

—

VCAPEN(1)

—

WRT<1:0>

Legend:

— = unimplemented locations read as ‘0’. Shaded cells are not used by LDO.

Note

PIC16F1526/27 only.

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