PIC16F1526 datasheet(117/354 Pages) MICROCHIP

117 / 354 page

 2011 Microchip Technology Inc.

Preliminary

DS41458A-page 117

PIC16(L)F1526/27

12.0

I/O PORTS

In general, when a peripheral is enabled on a port pin,

that pin cannot be used as a general purpose output.

However, the pin can still be read.

Each port has three standard registers for its operation.

These registers are:

• TRISx registers (data direction)

• PORTx registers (reads the levels on the pins of

the device)

• LATx registers (output latch)

Some ports may have one or more of the following

additional registers. These registers are:

• ANSELx (analog select)

• WPUx (weak pull-up)

The Data Latch (LATA register) is useful for

read-modify-write operations on the value that the I/O

pins are driving.

A write operation to the LATA register has the same

affect as a write to the corresponding PORTA register.

A read of the LATA register reads of the values held in

the I/O PORT latches, while a read of the PORTA

The port has analog functions and has an ANSELA

power. A simplified model of a generic I/O port, without

the interfaces to other peripherals, is shown in

Figure 12-1.

FIGURE 12-1:

GENERIC I/O PORT

OPERATION

EXAMPLE 12-1:

INITIALIZING PORTA

TABLE 12-1:

PORT AVAILABILITY PER

DEVICE

Device

PIC16(L)F1526

●●●●●●●

PIC16(L)F1527

●●●●●●●

Write LATx

Data Register

I/O pin

Read PORTx

Write PORTx

TRISx

Read LATx

Data Bus

To peripherals

ANSELx

VDD

VSS

; This code example illustrates

; initializing the PORTA register. The

; other ports are initialized in the same

; manner.

BANKSEL

PORTA

;

CLRF

PORTA

;Init PORTA

BANKSEL

LATA

;Data Latch

CLRF

LATA

;

BANKSEL

ANSELA

;

CLRF

ANSELA

;digital I/O

BANKSEL

TRISA

;

MOVLW

B'00111000' ;Set RA<5:3> as inputs

MOVWF

TRISA

;and set RA<2:0> as

;outputs

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