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PIC16F1526 Datasheet(PDF) 133 Page - Microchip Technology |
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PIC16F1526 Datasheet(HTML) 133 Page - Microchip Technology |
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133 / 354 page ![]() 2011 Microchip Technology Inc. Preliminary DS41458A-page 133 PIC16(L)F1526/27 TABLE 12-12: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE REGISTER 12-22: ANSELE: PORTE ANALOG SELECT REGISTER U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 — — — — — ANSE2 ANSE1 ANSE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-3 Unimplemented : Read as ‘0’ bit 2-0 ANSE<2:0> : Analog Select between Analog or Digital Function on pins RE<2:0>, respectively 0 = Digital I/O. Pin is assigned to port or digital special function. 1 = Analog input. Pin is assigned as analog input(1). Digital input buffer disabled. Note 1: When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to allow external control of the voltage on the pin. REGISTER 12-23: WPUE: WEAK PULL-UP PORTE REGISTER R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 WPUE7 WPUE6 WPUE5 WPUE4 WPUE3 WPUE2 WPUE1 WPUE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-0 WPUE<7:0> : Weak Pull-up Register bits 1 = Pull-up enabled 0 = Pull-up disabled Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled. 2: The weak pull-up device is automatically disabled if the pin is in configured as an output. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page APFCON — — — — — — T3CKISEL CCP2SEL 124 ANSELE — — — — — ANSE2 ANSE1 ANSE0 133 LATE LATE7 LATE6 LATE5 LATE4 LATE3 LATE2 LATE1 LATE0 132 PORTE RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0 132 TRISE TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0 132 WPUE WPUE7 WPUE6 WPUE5 WPUE4 WPUE3 WPUE2 WPUE1 WPUE0 133 Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTE. |
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