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PIC16F1526 Datasheet(PDF) 140 Page - Microchip Technology |
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PIC16F1526 Datasheet(HTML) 140 Page - Microchip Technology |
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140 / 354 page ![]() PIC16(L)F1526/27 DS41458A-page 140 Preliminary 2011 Microchip Technology Inc. TABLE 12-17: SUMMARY OF REGISTERS ASSOCIATED WITH PORTG TABLE 12-18: SUMMARY OF CONFIGURATION WORD WITH PORTG REGISTER 12-32: WPUG: WEAK PULL-UP PORTG REGISTER U-0 U-0 R/W-1/1 U-0 U-0 U-0 U-0 U-0 — — WPUG5 — — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-6 Unimplemented: Read as ‘0’ bit 5 WPUG5: Weak Pull-up Register bit 1 = Pull-up enabled 0 = Pull-up disabled bit 4-0 Unimplemented: Read as ‘0’ Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled. 2: The weak pull-up device is automatically disabled if the pin is in configured as an output. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELG — — — ANSG4 ANSG3 ANSG2 ANSG1 — 139 LATG — — — LATG4 LATG3 LATG2 LATG1 LATG0 139 PORTG — — RG5 RG4 RG3 RG2 RG1 RG0 138 TRISG — — TRISG5 TRISG4 TRISG3 TRISG2 TRISG1 TRISG0 138 WPUG — —WPUG5 — — — — — 140 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTG. Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0 Register on Page CONFIG1 13:8 — FCMEN IESO CLKOUTEN BOREN<1:0> — 48 7:0 CP MCLRE PWRTE WDTE<1:0> FOSC<2:0> Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by PORTG. |
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