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WM8758CBGEFL/V Datasheet(PDF) 40 Page - Wolfson Microelectronics plc |
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WM8758CBGEFL/V Datasheet(HTML) 40 Page - Wolfson Microelectronics plc |
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40 / 90 page ![]() WM8758B Production Data w PD, Rev 4.4, January 2012 40 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R34 ALC Control 3 8 ALCMODE 0 Determines the ALC mode of operation: 0 = ALC mode 1 = Limiter mode. 7:4 ALCDCY [3:0] 0011 (13.1ms/6dB) Decay (gain ramp-up) time (ALCMODE ==0) Per step Per 6dB 90% of range 0000 410us 3.3ms 24ms 0001 820us 6.6ms 48ms 0010 1.64ms 13.1ms 192ms … (time doubles with every step) 1010 or higher 420ms 3.36s 24.576s 0011 (2.9ms/6dB) Decay (gain ramp-up) time (ALCMODE ==1) Per step Per 6dB 90% of range 0000 90.8us 726.4us 5.26ms 0001 181.6us 1.453ms 10.53ms 0010 363.2us 2.905ms 21.06ms … (time doubles with every step) 1010 93ms 744ms 5.39s 3:0 ALCATK [3:0] 0010 (832us/6dB) ALC attack (gain ramp-down) time (ALCMODE == 0) Per step Per 6dB 90% of range 0000 104us 832us 6ms 0001 208us 1.664ms 12ms 0010 416us 3.328ms 24.1ms … (time doubles with every step) 1010 or higher 106ms 852ms 6.18s 0010 (182us/6dB) ALC attack (gain ramp-down) time (ALCMODE == 1) Per step Per 6dB 90% of range 0000 22.7us 182.4us 1.31ms 0001 45.4us 363.2us 2.62ms 0010 90.8us 726.4us 5.26ms … (time doubles with every step) 1010 23.2ms 186ms 1.348s Table 18 ALC Control Registers When the ALC is disabled, the input PGA remains at the last controlled value of the ALC. An input gain update must be made by writing to the INPPGAVOLL/R register bits. |
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