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WM8758CBGEFL/V Datasheet(PDF) 56 Page - Wolfson Microelectronics plc

Part # WM8758CBGEFL/V
Description  Stereo CODEC with Headphone Driver and Line Out
PDF  90 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8758CBGEFL/V Datasheet(HTML) 56 Page - Wolfson Microelectronics plc

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WM8758B
Production Data
w
PD, Rev 4.4, January 2012
56
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R54
LOUT2
Volume
control
7
LOUT2ZC
0
LOUT2 volume zero cross enable:
1 = Change gain on zero cross only
0 = Change gain immediately
6
LOUT2MUTE
0
Left output mute:
0 = Normal operation
1 = Mute
5:0
LOUT2VOL
111001
Left output volume:
000000 = -57dB
...
111001 = 0dB
...
111111 = +6dB
8
SPKVU
Not latched
LOUT2 and ROUT2 volumes do not
update until a 1 is written to SPKVU
(in reg 54 or 55)
R55
ROUT2
Volume
control
7
ROUT2ZC
0
ROUT2 volume zero cross enable:
1 = Change gain on zero cross only
0 = Change gain immediately
6
ROUT2MUTE
0
Right output mute:
0 = Normal operation
1 = Mute
5:0
ROUT2VOL
111001
Right output volume:
000000 = -57dB
...
111001 = 0dB
...
111111 = +6dB
8
SPKVU
Not latched
LOUT2 and ROUT2 volumes do not
update until a 1 is written to SPKVU
(in reg 54 or 55)
Table 35 OUT2 Volume Control
ZERO CROSS TIMEOUT
A zero-cross timeout function is provided so that if zero cross is enabled on the input or output PGAs
the gain will automatically update after a timeout period if a zero cross has not occurred. This is
enabled by setting SLOWCLKEN. The timeout period is dependent on the clock input to the digital
and is equal to 2
21 * SYSCLK period.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R7
Additional
Control
0
SLOWCLKEN
0
Slow clock enable. Used for both the
jack insert detect debounce circuit and
the zero cross timeout.
0 = slow clock disabled
1 = slow clock enabled
Table 36 Timeout Clock Enable Control



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