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WM1811A Datasheet(PDF) 95 Page - Wolfson Microelectronics plc |
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WM1811A Datasheet(HTML) 95 Page - Wolfson Microelectronics plc |
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95 / 328 page ![]() Production Data WM1811A w PD, November 2013, Rev 4.1 95 AIF2 - INPUT PATH NOISE GATE CONTROL The WM1811A provides a digital noise gate function for the AIF2 input paths. The noise gate ensures best noise performance when the signal path is idle. When the noise gate is enabled, and the signal level is below the noise gate threshold, then the noise gate is activated, causing the signal path to be muted. The AIF2 input path noise gate is enabled using the AIF2DAC_NG_ENA register. The noise gate threshold (the signal level below which the noise gate is activated) is set using AIF2DAC_NG_THR. To prevent erroneous triggering, a time delay is applied before the gate is activated; the signal path is only muted when the signal level stays below the threshold for longer than ‘hold time’, determined by the AIF2DAC_NG_HLD register. When the noise gate is activated, the WM1811A gradually attenuates the AIF2 input signal paths until each is entirely muted. When the signal level increases, and the noise gate is de-activated, the gain will return to the AIF2DACL_VOL and AIF2DACR_VOL digital gain settings. The un-mute behaviour can be immediate or gradual; this is determined by the AIF2DAC_MUTERATE and AIF2DAC_UNMUTE_RAMP registers described in Table 47. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1328 (0530h) AIF2 DAC Noise Gate 6:5 AIF2DAC_ NG_HLD [1:0] 11 AIF2DAC input path Noise Gate Hold Time (delay before noise gate is activated) 00 = 30ms 01 = 125ms 10 = 250ms 11 = 500ms 3:1 AIF2DAC_ NG_THR [2:0] 100 AIF2DAC input path Noise Gate Threshold 000 = -60dB 001 = -66dB 010 = -72dB 011 = -78dB 100 = -84dB 101 = -90dB 110 = -96dB 111 = -102dB 0 AIF2DAC_ NG_ENA 0 AIF2DAC input path Noise Gate Enable 0 = Disabled 1 = Enabled Table 48 AIF2 Input Path Noise Gate Control AIF2- INPUT PATH MONO MIX CONTROL A digital mono mix can be selected on theAIF2input channels. The mono mix is generated as the sum of the Left and Right AIF channel data. When the mono mix function is enabled, the combined mono signal is applied to the Left channel and the Right channel of the AIF2 signal processing and digital mixing paths. To prevent clipping, 6dB attenuation is applied to the mono mix. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1312(0520h) AIF2DAC Filters (1) 7 AIF2DAC_ MONO 0 AIF2DAC input path Mono Mix Control 0 = Disabled 1 = Enabled Table 49 AIF2 Input Path Mono Mix Control |
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