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LAN9500AI Datasheet(PDF) 22 Page - Microchip Technology

Part # LAN9500AI
Description  LAN950x USB 2.0 to 10/100 Ethernet Controller
PDF  213 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9500AI Datasheet(HTML) 22 Page - Microchip Technology

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LAN950x
DS00001875A-page 22
 2010 - 2015 Microchip Technology Inc.
3.1
Pin Assignments
Note 3-3
This pin is a no-connect (NC) for LAN9500A/LAN9500Ai, but may be connected to VDD33A for
backward compatibility with LAN9500/LAN9500i.
Note 3-4
For LAN9500A/LAN9500Ai this pin provides additional PME related functionality. Refer to the
respective pin descriptions and Section 6.0, "PME Operation," on page 112 for additional information.
TABLE 3-9:
56-QFN PACKAGE PIN ASSIGNMENTS
Pin
Num
Pin Name
Pin
Num
Pin Name
Pin
Num
Pin Name
Pin
Num
Pin Name
1
nPHY_INT
15
VDD33A
29
EECLK/
PWR_SEL
43
TXEN
2
TXN
16
USBRBIAS
30
EECS
44
RXER
3
TXP
17
VDDUSBPLL
31
EEDO/
AUTOMDIX_EN
45
CRS/GPIO3
4
VDD33A
18
XI
32
EEDI
46
COL/GPIO0
Note 3-4
5
RXN
19
XO
33
TEST3
47
TXCLK
6
RXP
20
VBUS_DET
Note 3-4
34
PHY_SEL
48
VDD33IO
7NC
Note 3-3
21
VDDCORE
35
VDD33IO
49
TEST1
8
EXRES
22
MDC/GPIO2
36
nTRST/RXD0
50
VDDCORE
9
VDD33A
23
MDIO/GPIO1
Note 3-4
37
TDO/nPHY_RST
51
VDD33IO
10
VDDPLL
24
nRESET
Note 3-4
38
TCK/RXD1
52
VDD33IO
11
USBDM
25
VDD33IO
39
TMS/RXD2
53
TXD3/GPIO7/
EEP_SIZE
12
USBDP
26
nFDX_LED/
GPIO8
40
TDI/RXD3
54
TXD2/GPIO6/
PORT_SWAP
13
TEST2
27
nLNKA_LED/
GPIO9
Note 3-4
41
RXCLK
55
TXD1/GPIO5/
RMT_WKP
14
NC
28
nSPD_LED/
GPIO10
Note 3-4
42
RXDV
56
TXD0/GPIO4/
EEP_DISABLE
EXPOSED PAD
MUST BE CONNECTED TO VSS



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