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LAN9500AI Datasheet(PDF) 49 Page - Microchip Technology

Part # LAN9500AI
Description  LAN950x USB 2.0 to 10/100 Ethernet Controller
PDF  213 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9500AI Datasheet(HTML) 49 Page - Microchip Technology

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 2010 - 2015 Microchip Technology Inc.
DS00001875A-page 49
LAN950x
5.4.2.2
TX Data Format
The TX data section begins at the third DWORD in the TX buffer (after TX Command A and TX Command B). The loca-
tion of the first byte of valid buffer data to be transmitted is specified in the Data Start Offset field of TX Command A.
Table 5-43, "TX Data Start Offset" shows the correlation between the setting of the Lab's in the Data Start Offset field
and the byte location of the first valid data byte.
TX data is contiguous until the end of the buffer. The buffer may end on a byte boundary. Unused bytes at the end of
the packet will not be sent to the TLI for transmission.
5.4.2.3
TX Buffer Fragmentation Rules
Transmit buffers must adhere to the following rules:
• Each buffer may start and end on any arbitrary byte alignment.
• The first buffer of any transmit packet can be any length.
• Middle buffers (i.e., those with First Segment = Last Segment = 0) must be greater than, or equal to 4 bytes in
length.
• The final buffer of any transmit packet can be any length.
5.4.2.4
FCT Actions
The FCT performs basic sanity checks on the correctness of the buffer configuration, as described in Section 5.4.2.5,
"TX Error Detection," on page 49. Errors in this regard indicate the TX path is out of sync, which is catastrophic and
requires a reinitialization of the TX path.
The FCT performs the following steps when extracting an Ethernet frame:
• Strip out TX Command A
• Strip out TX Command B
• Account for the byte offset at the beginning of the frame. Based upon the buffer size and DataStartOffset[1:0] field
of TX Command A, the FCT can numerically determine any unused bytes in the first and last word of the buffer.
When transferring these respective DWORDs to the TLI, the FCT adjusts the byte enables accordingly.
Unlike the write side, the read side of the TX FIFO does not need to support rewinds. Errors are reported via the Trans-
mitter Error (TXE) flag, which is visible to the Host via the Interrupt Endpoint and is also set in theInterrupt Status Reg-
ister (INT_STS).
5.4.2.5
TX Error Detection
As previously stated, both TX Command A and TX Command B are required for each buffer in a given frame. TX Com-
mand B must be identical for every buffer in a given frame, with the exception of the TX Checksum Enable (CK) bit. If
the TX Command B words do not match, then the TX path is out of sync and the FCT asserts the Transmitter Error (TXE)
flag.
Similarly, the FCT numerically adds up the size of the frame’s buffers. If there is a numerical mismatch, the TX path is
out of sync and the FCT asserts the Transmitter Error (TXE) flag. The following error conditions are tracked by the FCT:
• Missing FS - The expected first buffer of a frame does not have the FS bit set.
• Unexpected FS - The FS bit is set when the total size of buffers so far opened is less than the frame size.
• Missing LS - The total size of the buffers opened is equal to or exceeds the size of the frame. The FCT expects
this buffer to have the LS bit set and it is not set.
• Unexpected LS - The LS bit is set when the aggregate total size of descriptor buffers so far opened is less than the
frame size.
TABLE 5-43:
TX DATA START OFFSET
Data Start Offset[1:0]
11
10
01
00
First TX Data Byte
D[31:24]
D[23:16]
D[15:8]
D[7:0]
Note:
When a packet is split into multiple buffers, each successive buffer’s data payload may begin on any arbi-
trary byte.



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