LAN9500AI datasheet(84/213 Pages) MICROCHIP

84 / 213 page

LAN950x

DS00001875A-page 84

 2010 - 2015 Microchip Technology Inc.

5.7.4.1

Supported EEPROM Operations

The EEPROM controller supports the following EEPROM operations under Host control via the E2P_CMD register. The

operations are commonly supported by “93C46” EEPROM devices. A description and functional timing diagram is pro-

vided below for each operation. Please refer to the E2P_CMD register description in Section 7.3.12, "EEPROM Com-

mand Register (E2P_CMD)," on page 136 for E2P_CMD field settings for each command.

ERASE (Erase Location): If erase/write operations are enabled in the EEPROM, this command will erase the location

selected by the EPC Address field (EPC_ADDR). The EPC_TO bit is set if the EEPROM does not respond within 30mS.

ERAL (Erase All): If erase/write operations are enabled in the EEPROM, this command will initiate a bulk erase of the

entire EEPROM.The EPC_TO bit is set if the EEPROM does not respond within 30mS.

EWDS (Erase/Write Disable): After issued, the EEPROM will ignore erase and write commands. To re-enable

erase/write operations issue the EWEN command.

FIGURE 5-21:

EEPROM ERASE CYCLE

FIGURE 5-22:

EEPROM ERAL CYCLE

EECLK

EEDIO (INPUT)

EEDIO (OUTPUT)

EECS

tCSL

EECLK

EEDIO (INPUT)

EEDIO (OUTPUT)

EECS

tCSL

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