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LAN9500AI Datasheet(PDF) 129 Page - Microchip Technology |
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LAN9500AI Datasheet(HTML) 129 Page - Microchip Technology |
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129 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 129 LAN950x 7.3.9 LED GENERAL PURPOSE IO CONFIGURATION REGISTER (LED_GPIO_CFG) This register configures the external GPIO[10:8] pins. In order for a GPIO to function as a wake event or interrupt source, it must be configured as an input. GPIO pins used to generate wake events must also be enabled by the GPIO_WAKE register, see Section 7.3.20, "General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE)". Address: 024h Size: 32 bits Bits Description Type Default 31 (LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED) LED Select (LED_SEL) This bit determines the functionality of external LED pins. Note: This field is protected by Reset Protection (RST_PROTECT). R/W Note 7-11 30:26 RESERVED RO - 25:24 GPIO 10 Control (GPCTL10) The value of this field determines the function of the external GPIO10 pin as follows: 00 = GPIO10 01 = nSPD_LED (Ethernet speed indicator LED) 10 = RXD0 11 = RXD3 Note: When enabled as RXD0 or RXD3, the external device pin will reflect the state of the corresponding internal MII signal. This feature is useful as a diagnostic tool. R/W 00b 23:22 RESERVED RO - 21:20 GPIO 9 Control (GPCTL9) The value of this field determines the function of the external GPIO9 pin as follows: 00 = GPIO9 01 = Note 7-12 10 = RXD1 11 = nPHY_RST Note: When enabled as RXD1 or nPHY_RST, the external device pin will reflect the state of the corresponding internal MII signal. This feature is useful as a diagnostic tool. R/W 00b 19:18 RESERVED RO - BIT VALUE PIN NAME FUNCTION 0 nSPD_LED Speed Indicator nLNKA_LED Link and Activity Indicator nFDX_LED Full Duplex Link Indicator Note: Hardware defaults to Activity Indicator. Software must manipulate to provide Full Duplex indication. 1 nSPD_LED Speed Indicator nLNKA_LED Link Indicator nFDX_LED Activity Indicator |
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