LAN9500AI datasheet(135/213 Pages) MICROCHIP

Part #	LAN9500AI

Description	LAN950x USB 2.0 to 10/100 Ethernet Controller

PDF	213 Pages

Scroll/Zoom	100%

Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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135 / 213 page

 2010 - 2015 Microchip Technology Inc.

DS00001875A-page 135

LAN950x

Flow Control on Any Frame (FCANY)

When this bit is set, the device will assert back pressure, or transmit a pause

frame when the AFC level is reached and any frame is received. Setting this

bit enables full-duplex flow control when the device is operating in full-duplex

mode.

When this mode is enabled during half-duplex operation, the Flow Controller

does not decode the MAC address and will send a pause frame upon receipt

of a valid preamble (i.e., immediately at the beginning of the next frame after

the RX Data FIFO level is reached).

When this mode is enabled during full-duplex operation, the Flow Controller

will immediately instruct the MAC to send a pause frame when the RX Data

FIFO level is reached. The MAC will queue the pause frame transmission for

the next available window.

Setting this bit overrides bits [3:1] of this register.

R/W

Bits

Description

Type

Default

LAN9500AI Datasheet(PDF) 135 Page - Microchip Technology