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LAN9500AI Datasheet(PDF) 152 Page - Microchip Technology |
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LAN9500AI Datasheet(HTML) 152 Page - Microchip Technology |
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152 / 213 page ![]() LAN950x DS00001875A-page 152 2010 - 2015 Microchip Technology Inc. 7.3.26 TRANSMIT FIFO POINTER DEBUG REGISTER (DBG_TX_FIFO_PTR) This register provides information about the TX FIFO read/write pointers. Address: 07Ch Size: 32 bits Bits Description Type Default 31:27 RESERVED RO - 26:16 TX FIFO Read Pointer (TXRDPTR) Current value of TX FIFO read pointer (DWORD address). RO 000h 15:11 RESERVED RO - 10:0 TX FIFO Write Pointer (TXWRPTR) Current value of TX FIFO write pointer (DWORD address). RO 000h |
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