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LAN9500AI Datasheet(PDF) 183 Page - Microchip Technology |
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LAN9500AI Datasheet(HTML) 183 Page - Microchip Technology |
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183 / 213 page ![]() 2010 - 2015 Microchip Technology Inc. DS00001875A-page 183 LAN950x 7.5.9 MODE CONTROL/STATUS REGISTER Index (In Decimal): 17 Size: 16 bits Bits Description Type Default 15:14 RESERVED RO - 13 EDPWRDOWN Enable the Energy Detect Power-Down mode: 0 = Energy Detect Power-Down is disabled 1 = Energy Detect Power-Down is enabled Note: When in EDPD mode, the device’s NLP characteristics can be modified via the EDPD NLP / Crossover Time Configuration Register (LAN9500A/LAN9500Ai Only). R/W 0b 12:2 RESERVED RO - 1 ENERGYON Indicates whether energy is detected. This bit goes to a “0” if no valid energy is detected within 256ms. Reset to “1” by hardware reset, unaffected by SW reset. RO 1b 0 RESERVED R/W 0b |
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