M38B53M4-059FP datasheet(298/355 Pages) MITSUBISHI

298 / 355 page

3-50

APPENDIX

38B5 Group User’s Manual

3.5 Control registers

Fig. 3.5.32 Structure of A-D control register

Fig. 3.5.31 Structure of interrupt interval determination control register

Interrupt interval determination control register

b7 b6 b5 b4 b3 b2 b1 b0

Interrupt interval determination control register

(IIDCON: address 3116)

0: Stopped

1: Operating

Name

Functions

At reset R W

0: f(XIN)/128

1: f(XIN)/256

0 0: Filter is not used.

0 1: f(XIN)/32

1 0: f(XIN)/64

1 1: f(XIN)/128

Counter sampling

clock selection bit

One-sided/both-

sided edge

detection selection

bit

Noise filter

sampling clock

selection bits (INT2)

b3 b2

0: One-sided edge

detection

1: Both-sided edge

detection (Note)

Interrupt interval

determination circuit

operating selection

bit

Nothing is arranged for these bits. These are

write disabled bits. When these bits are read

out, the contents are “0”.

Note: When the noise filter sampling clock selection bits (bits 2, 3) is

“00”, the both-sided edge detection function cannot be used.

A-D control register

b7 b6 b5 b4 b3 b2 b1 b0

A-D control register

(ADCON: address 3216)

Name

Functions

At reset R W

Analog input pin

selection bits

b3 b2 b1 b0

0 0 0 0: P70/AN0

0 0 0 1: P71/AN1

0 0 1 0: P72/AN2

0 0 1 1: P73/AN3

0 1 0 0: P74/AN4

0 1 0 1: P75/AN5

0 1 1 0: P76/AN6

0 1 1 1: P77/AN7

1 0 0 0: P62/SRDY1/AN8

1 0 0 1: P63/AN9

1 0 1 0: P64/INT4/SBUSY1/AN10

1 0 1 1: P65/SSTB1/AN11

AD conversion

completion bit

0: Conversion in progress

1: Conversion completed

Nothing is arranged for these bits. These are

write disabled bits. When these bits are read

out, the contents are “0”.

M38B53M4-059FP Datasheet(PDF) 298 Page - Mitsubishi Electric Semiconductor

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