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M38B53M4-059FP Datasheet(PDF) 295 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP Datasheet(HTML) 295 Page - Mitsubishi Electric Semiconductor |
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295 / 355 page ![]() 38B5 Group User’s Manual 3-47 APPENDIX 3.5 Control registers Fig. 3.5.26 Structure of watchdog timer control register Fig. 3.5.27 Structure of timer X (low-order, high-order) Watchdog timer control register b7 b6 b5 b4 b3 b2 b1 b0 Watchdog timer control register (WDTCON: address 2B16) b 0 1 2 3 4 5 6 1 Functions Name At reset R W 1 1 1 1 1 0 Watchdog timer H (high-order 6 bits of reading exclusive) STP instruction disable bit 0: STP instruction enabled 1: STP instruction disabled 7 0 Watchdog timer H count source selection bit 0: Watchdog timer L underflow 1: f(XIN)/16 or f(XCIN)/16 Timer X (low-order, high-order) b7 b6 b5 b4 b3 b2 b1 b0 Timer X (low-order, high-order) (TXL, TXH: addresses 2C16, 2D16) b 0 1 2 3 4 5 6 7 1 Functions At reset R W 1 1 1 1 1 1 1 • Set timer X count value. • When the timer X write control bit of the timer X mode register 1 is “0”, the value is written to timer X and the latch at one time. When the timer X write control bit of the timer X mode register 1 is “1”, the value is written only to the latch. • The timer X count value is read out by reading this register. Notes 1: When reading and writing, perform them to both the high- order and low-order bytes. 2: Read both registers in order of TXH and TXL following. 3: Write both registers in order of TXL and TXH following. 4: Do not read both registers during a write, and do not write to both registers during a read. |
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