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TMS320DM814X Datasheet(PDF) 312 Page - Texas Instruments |
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TMS320DM814X Datasheet(HTML) 312 Page - Texas Instruments |
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312 / 377 page ![]() = Rcp Rcp Cac DDR_1V5 0.1 µF A2 A3 A4 A3 A2 A3 A4 A3 AT AT A1 A2 Processor Address and Control Output Buffer DDR Address and Control Input Buffers A3 A4 A3 AT Vtt Address and Control Terminator Rtt TMS320DM8148, TMS320DM8147 SPRS647E – MARCH 2011 – REVISED DECEMBER 2013 www.ti.com Figure 8-59. ADDR_CTRL Topology for Four x8 DDR3 Devices 8.13.4.2.4.11.3 CK and ADDR_CTRL Routing, Four DDR3 Devices Figure 8-60 shows the CK routing for four DDR3 devices placed on the same side of the PCB. Figure 8-61 shows the corresponding ADDR_CTRL routing. Figure 8-60. CK Routing for Four Single-Side DDR3 Devices 312 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320DM8148 TMS320DM8147 |
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