HT85F2240 datasheet(98/147 Pages) HOLTEK

98 / 147 page

Rev. 1.10

98 of 147

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A/D Flash 8051 Core Low Pin Count MCU

HT85F2230/HT85F2240

These registers operate as pairs, for example P0M0 and P0M1, to select the operating mode for

each I/O pin. The following table shows how the PnM0 and PnM1 bits are used to select the I/O

operating mode.

PnM0.m

PnM1.m

Configuration of Port n.m

Q�asi-bidirectiona�

P�sh-P�� O�tp�t

Inp�t-On�� – High Impedance Inp�t

Open-Drain O�tp�t

Note: n=0~� which se�ects Port 0 to Port �

m=0~7 which se�ects the port pin

P0WAKE Register – Port 0 Wake-up

P0WAKE Register

SFR Address: 91h

Bit

Name

P07WU

P06WU

P0�WU

P04WU

P0�WU

P01WU

P00WU

R/W

POR

Bit 7~0

P0WAKE: Port 0 bit 7 ~ bit 0 Wake-up Control

0: Disable

1: Enable

When the device enters the IDLE or Power-Down Mode, the system clock will stop resulting in

power being conserved, a feature that is important for battery and other low-power applications.

Various methods exist to wake-up the microcontroller, one of which is to change the logic condition

on one of the P0.0~P0.7 pins to a low level. Note that the Port 0 wake-up functions are triggered

by a low logic level and not by a falling edge. This Port 0 wake-up function is especially suitable

for applications that can be woken up via external switches. The P0 wake up pins can be selected

individually to have this wake-up feature using the P0WAKE register.

HT85F2240 Datasheet(PDF) 98 Page - Holtek Semiconductor Inc

HT85F2240 Datasheet(HTML) 98 Page - Holtek Semiconductor Inc

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