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TDSUSBF Datasheet(PDF) 10 Page - TEKTRONIX, INC. |
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TDSUSBF Datasheet(HTML) 10 Page - TEKTRONIX, INC. |
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10 / 46 page ![]() PCI Express® Transmitter Compliance and Debug (Option PCE3) – Analyze the performance of your PCI Express® Rev 1.0, 2.0, or 3.0 (draft spec) design with comprehensive test support. Using DPOJET, Option PCE3 enables tests that conform to PCI-SIG standards. NRZ and PAM4 measurements-The throughput of Datacom networks continues to increase. Tek's DPO73304DX supports up to 10GBASE KRn data rates. The powerful combination of the DPO70000, DPOJET Jitter and Noise Analysis, and the SDLA Serial Data Link Analysis tool performs accurate de-embedding and eye diagram analysis for Datacom standards. For more information on PAM4 testing, please refer to the DPO70000SX datasheet and related PAM4 documents. Ethernet Compliance Test Solution (Option ET3) – Receive full PHY layer support for Ethernet variants 10BASE-T, 100BASE-TX, and 1000BASE-T with the comprehensive, integrated Tektronix® Ethernet tool set. Analog verification, automated compliance software, and device characterization solutions are all included. C-PHY uses a unique mechanism for clock recovery. C-PHY 1.0 implements a custom clock recovery algorithm referred to as triggered eye. In this model, the first zero crossing of the four differential signals is used as a trigger point for clock recovery and rendering the eye diagram. The eye mask is optimally placed for maximum eye opening where the eye height is measured. Because of the triggered eye mechanism, all the jitter at the trigger point (zero crossing) is swallowed and reflected on the other side. Jitter and eye diagram rendering performed over the entire record length helps designers better characterize devices by displaying anomalies of the device over an extended period. The software allows you to run the eye diagram analysis for 3M UI and overnight runs for a detailed characterization. Datasheet 10 www.tek.com |
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