ATM90E32AS-AU-R datasheet(65/84 Pages) ATMEL

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M90E32AS [DATASHEET]

Atmel-46003B-SE-M90E32AS-Datasheet_02122015

EMMIntEn1

EMM Interrupt Enable 1

LastSPIData

Last Read/Write SPI Value

Address: 76H

Type: Read/ Write

Default Value: 0000H

Bit

Name

Description

FreqHiIntEn FreqHiIntST status change interrupt generation enable

SagPhase-

AIntEN

Phase A Sag status change interrupt generation enable

SagPhase-

BIntEN

Phase B Sag status change interrupt generation enable

SagPhase-

CIntEN

Phase C Sag status change interrupt generation enable

FreqLoIntEn FreqLoIntST status change interrupt generation enable

PhaseLos-

sAIntEN

Phase A Phase Loss status change interrupt generation enable

PhaseLoss-

BIntEN

Phase B Phase Loss status change interrupt generation enable

PhaseLoss-

CIntEN

Phase C Phase Loss status change interrupt generation enable

QERegTPIntE

ReActive (Q) Energy(E) Register (Reg) of all channel totoal sum (T) Positive (P) Status Change Interrupt

Generation Enable (IntEN)

QERegAP-

IntEN

QERegB-

PIntEN

RegCPIntEN

PERegTPIntE

Active (P) Energy (E) Register (Reg) of Channel A (A) Positive (P) Status Change Interrupt Generation E

nable (ST)

PERegAPIntE

PERegBPIntE

PERegCPIntE

Address: 78H

Type: Read

Default Value: 0000H

Bit

Name

Description

15:0

LastSPI-

Data[15:0]

This register is a special register which logs data of the previous SPI Read or Write access especially for

Read/Clear registers. This register is useful when the user wants to check the integrity of the last SPI

access.

ATM90E32AS-AU-R Datasheet(PDF) 65 Page - ATMEL Corporation

ATM90E32AS-AU-R Datasheet(HTML) 65 Page - ATMEL Corporation

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