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ATM90E32AS-AU-R Datasheet(PDF) 32 Page - ATMEL Corporation |
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ATM90E32AS-AU-R Datasheet(HTML) 32 Page - ATMEL Corporation |
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32 / 84 page ![]() M90E32AS [Datasheet] Atmel-46003B-SE-M90E32AS-Datasheet_02122015 32 5REGISTER 5.1 REGISTER LIST Table-5 Register List Register Address Register Name Read/ Write Type Functional Description Comment Page Status and Special Register 00H MeterEn R/W Metering Enable P41 01H ChannelMapI R/W Current Channel Mapping Configuration P42 02H ChannelMapU R/W Voltage Channel Mapping Configuration P42 05H SagPeakDetCfg R/W Sag and Peak Detector Period Configuration P44 06H OVth R/W Over Voltage Threshold P44 07H ZXConfig R/W Zero-Crossing Configuration Configuration of ZX0/1/2 pins’ source P45 08H SagTh R/W Voltage Sag Threshold P45 09H PhaseLossTh R/W Voltage Phase Losing Threshold Similar to Voltage Sag Threshold register P45 0AH InWarnTh R/W Neutral Current (Calculated) Warning Thresh- old P46 0BH OIth R/W Over Current Threshold P46 0CH FreqLoTh R/W Low Threshold for Frequency Detection P46 0DH FreqHiTh R/W High Threshold for Frequency Detection P46 0EH PMPwrCtrl R/W Partial Measurement Mode Power Control P47 0FH IRQ0MergeCfg R/W IRQ0 Merge Configuration Refer to 4.2.2 Reliability E nhancement Feature P47 Low Power Mode Register 10H DetectCtrl R/W Current Detect Control P48 11H DetectTh1 R/W Channel 1 Current Threshold in Detection Mode P49 12H DetectTh2 R/W Channel 2 Current Threshold in Detection Mode P49 13H DetectTh3 R/W Channel 3 Current Threshold in Detection Mode P49 14H IDCoffsetA R/W Phase A Current DC offset P50 15H IDCoffsetB R/W Phase B Current DC offset P50 16H IDCoffsetC R/W Phase C Current DC offset P50 17H UDCoffsetA R/W Voltage DC offset for Channel A P50 18H UDCoffsetB R/W Voltage DC offset for Channel B P50 19H UDCoffsetC R/W Voltage DC offset for Channel C P51 1AH UGainTAB R/W Voltage Gain Temperature Compensation for Phase A/B P51 1BH UGainTC R/W Voltage Gain Temperature Compensation for Phase C P51 1CH PhiFreqComp R/W Phase Compensation for Frequency P51 20H LOGIrms0 R/W Current (Log Irms0) Configuration for Seg- ment Compensation P51 21H LOGIrms1 R/W Current (Log Irms1) Configuration for Seg- ment Compensation P51 |
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