ATM90E32AS-AU-R datasheet(9/84 Pages) ATMEL

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M90E32AS [DATASHEET]

Atmel-46003B-SE-M90E32AS-Datasheet_02122015

OSCI

OSC

OSCI: External Crystal Input

OSCO: External Crystal Output

A 16.384 MHz crystal is connected between OSCI and OSCO. There are

two on-chip capacitors, therefore no need of external capacitors.

OSCO

OSC

ZX0

ZX1

ZX2

OLVTTL

ZX2/ZX1/ZX0:Zero-Crossing Output

These pins are asserted when voltage or current crosses zero. Zero-cross-

ing mode can be configured by the ZXConfig register (07H).

CF1

LVTTL

CF1: (all-phase-sum total) Active Energy Pulse Output

CF2

LVTTL

CF2: (all-phase-sum total) Reactive/ Apparent Energy Pulse Output

The output of this pin is determined by the CF2varh bit (b7, MMode0).

CF3

LVTTL

CF3: (all-phase-sum total) Active Fundamental Energy Pulse Output

CF4

LVTTL

CF4: (all-phase-sum total) Active Harmonic Energy Pulse Output

WarnOut

LVTTL

WarnOut: Fatal Error Warning

This pin is asserted high when there is metering related parameter check-

sum error. Otherwise this pin stays low. Refer to 5.2.2 IRQ and WarnOut

Signal Generation.

IRQ0

LVTTL

IRQ0: Interrupt Output 0

This pin is asserted when one or more events in the EMMIntState0 register

(1CCH) occur. It is deasserted when there is no bit set in the EMMIntState0

In Detection mode, the IRQ0 is used to indicate the output of current detec-

tor. The IRQ0 state is cleared when entering or exiting Detection mode.

IRQ1

LVTTL

IRQ1: Interrupt Output 1

This pin is asserted when one or more events in the EMMIntState1 register

(1D0H) occur. It is deasserted when there is no bit set in the EMMIntState1

In Detection mode, the IRQ1 is used to indicate the output of current detec-

tor. The IRQ1 state is cleared when entering or exiting Detection mode.

PM0

PM1

LVTTL

PM1/0: Power Mode Configuration

These two pins define the power mode of M90E32AS. Refer to Table-2.

LVTTL

CS: Chip Select (Active Low)

In SPI mode, this pin must be driven from high to low for each read/ write

operation, and maintain low for the entire operation.

SCLK

LVTTL

SCLK: Serial Clock

This pin is used as the clock for the SPI interface. Refer to 4 SPI Interface.

SDO

LVTTL

SDO: Serial Data Output

This pin is used as the data output for the SPI mode. Refer to 4 SPI Inter-

face.

SDI

LVTTL

SDI: Serial Data Input

This pin is used as the data input for the SPI mode. Refer to 4 SPI Interface.

TEST

LVTTL

This pin should be always connected to DGND in system application.

9, 10, 36

LVTTL

These pins should be always connected to DGND in system application.

35, 45, 46

NC: These pins should be left open.

Note 1: The channel mapping is only valid in Normal mode and Patial Measurement mode.

Note 2: All the digital input pins except OSCI are 5 V compatible.

Table-1 Pin Description (Continued)

Name

Pin No.

I/O

Type

Description

ATM90E32AS-AU-R Datasheet(PDF) 9 Page - ATMEL Corporation

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