NRF9160-SICA-R7 datasheet(108/400 Pages) NORDIC

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Peripherals

This feature can be used to wake up the CPU from a WFI or WFE type sleep in System ON when all

peripherals and the CPU are idle, meaning the lowest power consumption in System ON mode.

To prevent spurious interrupts from the PORT event while configuring the sources, the following steps

must be performed:

1. Disable interrupts on the PORT event (through INTENCLR.PORT).

2. Configure the sources (PIN_CNF[n].SENSE).

3. Clear any potential event that could have occurred during configuration (write

0 to EVENTS_PORT).

4. Enable interrupts (through INTENSET.PORT).

6.5.3 Tasks and events pin configuration

Each GPIOTE channel is associated with one physical GPIO pin through the CONFIG.PSEL field.

When Event mode is selected in CONFIG.MODE, the pin specified by CONFIG.PSEL will be configured

as an input, overriding the DIR setting in GPIO. Similarly, when Task mode is selected in CONFIG.MODE,

the pin specified by CONFIG.PSEL will be configured as an output overriding the DIR setting and OUT

value in GPIO. When Disabled is selected in CONFIG.MODE, the pin specified by CONFIG.PSEL will use its

configuration from the PIN[n].CNF registers in GPIO. CONFIG.MODE must be disabled in order to be able

to change the value of the PSEL field.

Note: A pin can only be assigned to one GPIOTE channel at a time. Failing to do so may result in

unpredictable behavior.

6.5.4 Registers

Base address Peripheral

Instance

Secure mapping

DMA security

Description

Configuration

0x5000D000 GPIOTE

GPIOTE0

Secure GPIO tasks and events

0x40031000

GPIOTE

GPIOTE1

Non Secure GPIO tasks and

events

Table 41: Instances

Offset

Security Description

TASKS_OUT[n]

0x000

Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in

CONFIG[n].POLARITY.

TASKS_SET[n]

0x030

Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.

TASKS_CLR[n]

0x060

Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.

SUBSCRIBE_OUT[n]

0x080

Subscribe configuration for task OUT[n]

SUBSCRIBE_SET[n]

0x0B0

Subscribe configuration for task SET[n]

SUBSCRIBE_CLR[n]

0x0E0

Subscribe configuration for task CLR[n]

EVENTS_IN[n]

0x100

Event generated from pin specified in CONFIG[n].PSEL

EVENTS_PORT

0x17C

Event generated from multiple input GPIO pins with SENSE mechanism enabled

PUBLISH_IN[n]

0x180

Publish configuration for event IN[n]

PUBLISH_PORT

0x1FC

Publish configuration for event PORT

INTENSET

0x304

Enable interrupt

INTENCLR

0x308

Disable interrupt

CONFIG[n]

0x510

Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event

Table 42: Register overview

6.5.4.1 TASKS_OUT[n] (n=0..7)

Address offset: 0x000 + (n × 0x4)

4418_1315 v2.0

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