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NRF9160-SICA-R7 Datasheet(PDF) 106 Page - Nordic Semiconductor |
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NRF9160-SICA-R7 Datasheet(HTML) 106 Page - Nordic Semiconductor |
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106 / 400 page ![]() Peripherals Symbol Description Min. Typ. Max. Units VOH,HDH Output high voltage, high drive, 5 mA, VDD >= 2.7 V VDD-0.4 VDD V VOH,HDL Output high voltage, high drive, 3 mA, VDD >= 1.7 V VDD-0.4 VDD V VOL,SD Output low voltage, standard drive, 0.5 mA, VDD ≥1.7 VSS VSS+0.4 V VOL,HDH Output low voltage, high drive, 5 mA, VDD >= 2.7 V VSS VSS+0.4 V VOL,HDL Output low voltage, high drive, 3 mA, VDD >= 1.7 V VSS VSS+0.4 V IOL,SD Current at VSS+0.4 V, output set low, standard drive, VDD ≥1.7 1 2 4 mA IOL,HDH Current at VSS+0.4 V, output set low, high drive, VDD >= 2.7 V 6 10 15 mA IOL,HDL Current at VSS+0.4 V, output set low, high drive, VDD >= 1.7 V 3 mA IOH,SD Current at VDD-0.4 V, output set high, standard drive, VDD ≥1.7 1 2 4 mA IOH,HDH Current at VDD-0.4 V, output set high, high drive, VDD >= 2.7 V 6 9 14 mA IOH,HDL Current at VDD-0.4 V, output set high, high drive, VDD >= 1.7 V 3 mA tRF,15pF Rise/fall time, standard drive mode, 10-90%, 15 pF load1 6 9 19 ns tRF,25pF Rise/fall time, standard drive mode, 10-90%, 25 pF load1 10 13 30 ns tRF,50pF Rise/fall time, standard drive mode, 10-90%, 50 pF load1 18 25 61 ns tHRF,15pF Rise/Fall time, high drive mode, 10-90%, 15 pF load1 2 4 8 ns tHRF,25pF Rise/Fall time, high drive mode, 10-90%, 25 pF load1 3 5 11 ns tHRF,50pF Rise/Fall time, high drive mode, 10-90%, 50 pF load1 5 8 19 ns RPU Pull-up resistance 11 13 16 kΩ RPD Pull-down resistance 11 13 16 kΩ CPAD Pad capacitance 3 pF 6.5 GPIOTE — GPIO tasks and events The GPIO tasks and events (GPIOTE) module provides functionality for accessing GPIO pins using tasks and events. Each GPIOTE channel can be assigned to one pin. A GPIOTE block enables GPIOs to generate events on pin state change which can be used to carry out tasks through the PPI system. A GPIO can also be driven to change state on system events using the PPI system. Tasks and events are briefly introduced in Peripheral interface on page 15, and GPIO is described in more detail in GPIO — General purpose input/output on page 97. Low power detection of pin state changes is possible when in System ON or System OFF. Instance Number of GPIOTE channels GPIOTE 8 Table 39: GPIOTE properties Up to three tasks can be used in each GPIOTE channel for performing write operations to a pin. Two tasks are fixed (SET and CLR), and one (OUT) is configurable to perform following operations: • Set • Clear • Toggle 1 Rise and fall times based on simulations 4418_1315 v2.0 106 |
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