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NRF9160-SICA-R7 Datasheet(PDF) 166 Page - Nordic Semiconductor

Part # NRF9160-SICA-R7
Description  nRF9160 Product Specification
PDF  400 Pages
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Manufacturer  NORDIC [Nordic Semiconductor]
Direct Link  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF9160-SICA-R7 Datasheet(HTML) 166 Page - Nordic Semiconductor

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Peripherals
Note that registers SEQ[n].REFRESH and SEQ[n].ENDDELAY are ignored when DECODER.MODE=NextStep.
The next value is loaded upon every received NEXTSTEP task.
SEQ[n].PTR is the pointer used to fetch COMPARE values from RAM. If the SEQ[n].PTR is not pointing to
a RAM region, an EasyDMA transfer may result in a HardFault or RAM corruption. See Memory on page
21 for more information about the different memory regions. After the SEQ[n].PTR is set to the desired
RAM location, the SEQ[n].CNT register must be set to the number of 16-bit half words in the sequence. It
is important to observe that the Grouped mode requires one half word per group, while the Single mode
requires one half word per channel, thus increasing the RAM size occupation. If PWM generation is not
running when the SEQSTART[n] task is triggered, the task will load the first value from RAM and then start
the PWM generation. A SEQSTARTED[n] event is generated as soon as the EasyDMA has read the first
PWM parameter from RAM and the wave counter has started executing it. When LOOP.CNT=0, sequence
n=0 or 1 is played back once. After the last value in the sequence has been loaded and started executing,
a SEQEND[n] event is generated. The PWM generation will then continue with the last loaded value. The
following figure illustrates an example of a simple playback.
P
O
L
COMPARE
0
SEQ[0].PTR
P
O
L
COMPARE
1
PWM pulse period
P
O
L
COMPARE
2
P
O
L
COMPARE
3
SEQEND[0]
SEQSTARTED[0]
SEQSTART[0]
Event/Tasks
Continues with last setting
Figure 46: Simple sequence example
The following source code is used for configuration and timing details in a sequence where only sequence
0 is used and only run once with a new PWM duty cycle for each period.
NRF_PWM0->PSEL.OUT[0] = (first_pin << PWM_PSEL_OUT_PIN_Pos) |
(PWM_PSEL_OUT_CONNECT_Connected <<
PWM_PSEL_OUT_CONNECT_Pos);
NRF_PWM0->ENABLE
= (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
NRF_PWM0->MODE
= (PWM_MODE_UPDOWN_Up << PWM_MODE_UPDOWN_Pos);
NRF_PWM0->PRESCALER
= (PWM_PRESCALER_PRESCALER_DIV_1 <<
PWM_PRESCALER_PRESCALER_Pos);
NRF_PWM0->COUNTERTOP = (16000 << PWM_COUNTERTOP_COUNTERTOP_Pos); //1 msec
NRF_PWM0->LOOP
= (PWM_LOOP_CNT_Disabled << PWM_LOOP_CNT_Pos);
NRF_PWM0->DECODER
= (PWM_DECODER_LOAD_Common << PWM_DECODER_LOAD_Pos) |
(PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);
NRF_PWM0->SEQ[0].PTR = ((uint32_t)(seq0_ram) << PWM_SEQ_PTR_PTR_Pos);
NRF_PWM0->SEQ[0].CNT = ((sizeof(seq0_ram) / sizeof(uint16_t)) <<
PWM_SEQ_CNT_CNT_Pos);
NRF_PWM0->SEQ[0].REFRESH = 0;
NRF_PWM0->SEQ[0].ENDDELAY = 0;
NRF_PWM0->TASKS_SEQSTART[0] = 1;
To completely stop the PWM generation and force the associated pins to a defined state, a STOP task can
be triggered at any time. A STOPPED event is generated when the PWM generation has stopped at the end
of the currently running PWM period, and the pins go into their idle state as defined in GPIO OUT register.
4418_1315 v2.0
166



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