NRF9160-SICA-R7 datasheet(163/400 Pages) NORDIC

163 / 400 page

Peripherals

FallingEdge. Counter running in up mode results in pulse widths that are edge-aligned. The following is the

code for the counter in up mode example:

uint16_t pwm_seq[4] = {PWM_CH0_DUTY, PWM_CH1_DUTY, PWM_CH2_DUTY, PWM_CH3_DUTY};

NRF_PWM0->PSEL.OUT[0] = (first_pin << PWM_PSEL_OUT_PIN_Pos) |

(PWM_PSEL_OUT_CONNECT_Connected <<

PWM_PSEL_OUT_CONNECT_Pos);

NRF_PWM0->PSEL.OUT[1] = (second_pin << PWM_PSEL_OUT_PIN_Pos) |

(PWM_PSEL_OUT_CONNECT_Connected <<

PWM_PSEL_OUT_CONNECT_Pos);

NRF_PWM0->ENABLE

= (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);

NRF_PWM0->MODE

= (PWM_MODE_UPDOWN_Up << PWM_MODE_UPDOWN_Pos);

NRF_PWM0->PRESCALER

= (PWM_PRESCALER_PRESCALER_DIV_1 <<

PWM_PRESCALER_PRESCALER_Pos);

NRF_PWM0->COUNTERTOP = (16000 << PWM_COUNTERTOP_COUNTERTOP_Pos); //1 msec

NRF_PWM0->LOOP

= (PWM_LOOP_CNT_Disabled << PWM_LOOP_CNT_Pos);

NRF_PWM0->DECODER

= (PWM_DECODER_LOAD_Individual << PWM_DECODER_LOAD_Pos) |

(PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);

NRF_PWM0->SEQ[0].PTR = ((uint32_t)(pwm_seq) << PWM_SEQ_PTR_PTR_Pos);

NRF_PWM0->SEQ[0].CNT = ((sizeof(pwm_seq) / sizeof(uint16_t)) <<

PWM_SEQ_CNT_CNT_Pos);

NRF_PWM0->SEQ[0].REFRESH = 0;

NRF_PWM0->SEQ[0].ENDDELAY = 0;

NRF_PWM0->TASKS_SEQSTART[0] = 1;

When the counter is running in up mode, the following formula can be used to compute the PWM period

and the step size:

PWM period:

TPWM(Up)= TPWM_CLK * COUNTERTOP

Step width/Resolution:

Tsteps= TPWM_CLK

The following figure shows the counter operating in up-and-down mode

(MODE=PWM_MODE_UpAndDown), with two PWM channels with the same frequency but different duty

cycle and output polarity:

4418_1315 v2.0

163

NRF9160-SICA-R7 Datasheet(PDF) 163 Page - Nordic Semiconductor