NRF9160-SICA-R7 datasheet(184/400 Pages) NORDIC

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Peripherals

RTC

TRIGOVRFLW

CLEAR

PRESCALER

CC[0:n]

COUNTER

START

TICK

OVRFLW

COMPARE[0:n]

CAPTURE[0:n]

STOP

32.768 kHz

LFCLK

Figure 51: RTC block diagram

The RTC module features a 24-bit COUNTER, a 12-bit (1/X) prescaler, compare registers, and a tick event

generator.

6.11.1 Clock source

The RTC will run off the LFCLK.

When started, the RTC will automatically request the LFCLK source with RC oscillator if the LFCLK is not

already running.

See CLOCK — Clock control on page 70 for more information about clock sources.

6.11.2 Resolution versus overflow and the prescaler

The relationship between the prescaler, counter resolution, and overflow is summarized in the following

table.

Prescaler

Counter resolution

Overflow

30.517 μs

512 seconds

28-1

7812.5 μs

131072 seconds

212-1

125 ms

582.542 hours

Table 62: RTC resolution versus overflow

The counter increment frequency is given by the following equation:

fRTC [kHz] = 32.768 / (PRESCALER + 1 )

The PRESCALER register can only be written when the RTC is stopped.

The prescaler is restarted on tasks START, CLEAR and TRIGOVRFLW. That is, the prescaler value is latched

to an internal register (<<PRESC>>) on these tasks.

Examples:

1. Desired COUNTER frequency 100 Hz (10 ms counter period)

PRESCALER = round(32.768 kHz / 100 Hz) - 1 = 327

fRTC = 99.9 Hz

10009.576 μs counter period

4418_1315 v2.0

184

NRF9160-SICA-R7 Datasheet(PDF) 184 Page - Nordic Semiconductor

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