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NRF9160-SICA-R7 Datasheet(PDF) 240 Page - Nordic Semiconductor |
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NRF9160-SICA-R7 Datasheet(HTML) 240 Page - Nordic Semiconductor |
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240 / 400 page  Peripherals tHMO MSb LSb MSb LSb MOSI (out) MISO (in) CPOL=0 CPHA=0 tSUMI tHMI tRSCK tFSCK tCSCK tWHSCK tWLSCK tVMO CPOL=1 CPHA=0 CPOL=0 CPHA=1 CPOL=1 CPHA=1 Figure 74: SPIM timing diagram 6.14 SPIS — Serial peripheral interface slave with EasyDMA SPI slave (SPIS) is implemented with EasyDMA support for ultra low power serial communication from an external SPI master. EasyDMA in conjunction with hardware-based semaphore mechanisms removes all real-time requirements associated with controlling the SPI slave from a low priority CPU execution context. EasyDMA RAM SPIS ACQUIRED RXD.PTR TXD.PTR TXD+1 TXD TXD+n TXD+2 RXD+1 RXD RXD+n RXD+2 EasyDMA MISO MOSI ACQUIRE RELEASE PSEL.MISO PSEL.MOSI PSEL.CSN PSEL.SCK Semaphore SPI slave tranceiver DEF CSN END ENDRX Figure 75: SPI slave The SPIS supports SPI modes 0 through 3. The CONFIG register allows setting CPOL and CPHA appropriately. 4418_1315 v2.0 240 |
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