NRF9160-SICA-R7 datasheet(266/400 Pages) NORDIC

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Peripherals

Master type

Security violation

Read/Write/Execute protection

violation

Cortex-M33

SecureFault exception

BusFault exception, RAMACCERR event

EasyDMA

RAZ/WI, RAMACCERR event

Other masters

RAZ/WI, RAMACCERR event

Table 81: Error reporting for RAM access errors

For a Cortex-M33 master, the SecureFault exception will take precedence over the BusFault exception if a

security violation occurs simultaneously with another type of violation.

6.15.4 Peripheral access control

Access controls are defined by the characteristics of the peripheral.

Peripherals can have their security attribute set as:

Always secure

For a peripheral related to system control

Always non-secure

For some general-purpose peripherals

Configurable

For general-purpose peripherals that may be configured for secure only access

The full list of peripherals and their corresponding security attributes can be found in Memory map on

page 23. For each peripheral with ID n, PERIPHID[n]. PERM will show whether the security attribute for

this peripheral is configurable or not.

If not hardcoded, the security attribute can configured using the PERIPHID[id].PERM.

At reset, all user-selectable and split security peripherals are set to be secure, with secure DMA where

present.

Secure code can access both secure peripherals and non-secure peripherals.

The nRF9160 does not support runtime security configuration of peripherals. It is thus, advisable that all

security settings on peripherals are set during boot time. Doing so will ensure the desired system security

configuration is deployed simultaneously system-wide.

6.15.4.1 Peripherals with split security

Peripherals with split security are defined to handle use-cases when both secure and non-secure code

needs to control the same resource.

When peripherals with split security have their security attribute set to non-secure, access to specific

registers and bitfields within some registers is dependent on the security attribute of the bus transfer. For

example, some registers will not be accessible for a non-secure transfer.

When peripherals with split security have their security attribute set to secure, then only secure transfers

can access their registers.

See Instantiation on page 24 for an overview of split security peripherals. Respective peripheral chapters

explain the specific security behavior of each peripheral.

6.15.4.2 Peripheral address mapping

Peripherals that have non-secure security mapping have their address starting with 0x4XXX_XXXX.

Peripherals that have secure security mapping have their address starting with 0x5XXX_XXXX.

4418_1315 v2.0

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