NRF9160-SICA-R7 datasheet(263/400 Pages) NORDIC

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Peripherals

Master type

Security violation

Read/Write/Execute protection

violation

Cortex-M33

SecureFault exception

BusFault exception, FLASHACCERR event

EasyDMA

RAZ/WI, FLASHACCERR event

Other masters

RAZ/WI, FLASHACCERR event

Table 80: Error reporting for flash access errors

For a Cortex-M33 master, the SecureFault exception will take precedence over the BusFault exception if a

security violation occurs simultaneously with another type of violation.

6.15.2.3 UICR and FICR protections

The user information configuration registers (UICR) and factory information configuration registers (FICR)

are always considered as secure. FICR registers are read-only. UICR registers can be read and written by

secure code only.

Writing new values to user information configuration registers must follow the procedure described in

NVMC — Non-volatile memory controller on page 29. Code execution from FICR and UICR address spaces

will always be reported as access violation, an exception to this rule applies during a debug session.

6.15.3 RAM access control

The RAM memory space is divided in regions, each of them with configurable permissions settings.

The RAM memory space is divided into 32 regions of 8 KiB.

For each region, four different types of permissions can be configured:

Read

Allows data read access to the region. Code fetch from this region is not controlled by the read

permission but by the execute permission described below.

Write

Allows write access to the region

Execute

Allows code fetch from this region

Secure

Allows only bus accesses with the security attribute set to access the region

Permissions can be set independently. For example, it is possible to configure a RAM region to be

accessible only through secure transfer, being read-only (no write allowed) and non-executable (no

code fetch allowed). For each region, permissions can be set and then locked to prevent subsequent

modifications by using the RAMREGION[n].PERM.LOCK bit.

The following figure shows the RAM memory space and the devided regions:

4418_1315 v2.0

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