 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HC705RC17GRS/D Datasheet(PDF) 32 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
HC705RC17GRS/D Datasheet(HTML) 32 Page - NXP Semiconductors |
|
|
32 / 126 page  Central Processor Unit (CPU) General Release Specification MC68HC705RC17 — Rev. 2.0 Central Processor Unit (CPU) 3.3 CPU Registers The MCU contains five registers as shown in Figure 3-1. The interrupt stacking order is shown in Figure 3-2. Figure 3-1. Programming Model Figure 3-2. Stacking Order A 70 X 70 HI N Z C CCR 11 SP 70 PC 13 0 ACCUMULATOR INDEX REGISTER PROGRAM COUNTER STACK POINTER CONDITION CODE REGISTER 0 0 0 0 0 13 0 INDEX REGISTER PCL ACCUMULATOR CONDITION CODE REGISTER PCH 11 1 70 STACK I N T E R R U P T DECREASING UNSTACK R E T U R N INCREASING NOTE: Since the stack pointer decrements during pushes, the PCL is stacked first, followed by PCH, etc. Pulling from the stack is in the reverse order. MEMORY ADDRESSES MEMORY ADDRESSES Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
