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HC705RC17GRS/D Datasheet(PDF) 91 Page - NXP Semiconductors |
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HC705RC17GRS/D Datasheet(HTML) 91 Page - NXP Semiconductors |
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91 / 126 page  EPROM Bootloader MC68HC705RC17 — Rev. 3.0 General Release Specification EPROM This counter requires a clock and a reset function. The 12-bit counter can address up to 4 Kbytes of memory, which means that two port pins have to be used to address the extra memory space. NOTE: The user code must be a one-to-one correspondence with the internal EPROM addresses. 11.4.2 Programming Register This register is used to program the EPROM array. Only the LATCH and EPGM bits are available in user mode. To program a byte of EPROM, set LATCH, then write data to the desired address, then set EPGM for tEPGM. LATCH — EPROM Latch Control READ: Any time WRITE: Any time 1 = EPROM address and data bus configured for programming. Causes address and data bus to be latched when a write to EPROM is done. EPROM cannot be read if LATCH = 1. 0 = EPROM address and data bus configured for normal reads EPGM — EPROM Program Control READ: Any time WRITE: Any time security is not set 1 = VPP switched on to the EPROM array. If LATCH = 1, EPGM switches programming power to the EPROM array. 0 = Programming power switched off the EPROM array Address: $001E Bit 7 654321 Bit 0 Read: RRRRR LATCH R EPGM Write: Reset: 00000000 R = Reserved Figure 11-2. Programming Register (PROG) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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