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HC705RC17GRS/D Datasheet(PDF) 45 Page - NXP Semiconductors |
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HC705RC17GRS/D Datasheet(HTML) 45 Page - NXP Semiconductors |
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45 / 126 page ![]() MC68HC705RC17 — Rev. 2.0 General Release Specification Resets General Release Specification — MC68HC705RC17 Section 5. Resets 5.1 Contents 5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 5.3 External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 5.4 Low-Power External Reset (LPRST) . . . . . . . . . . . . . . . . . . . .48 5.5 Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 5.5.1 Power-On Reset (POR). . . . . . . . . . . . . . . . . . . . . . . . . . . .48 5.5.2 Computer Operating Properly Reset (COPR) . . . . . . . . . . .49 5.5.2.1 Resetting the COP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 5.5.2.2 COP During Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . .49 5.5.2.3 COP During Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . .49 5.5.2.4 COP Watchdog Timer Considerations . . . . . . . . . . . . . . .50 5.5.3 Illegal Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.2 Introduction The MCU can be reset from five sources: two external inputs and three internal restart conditions. The RESET and LPRST pins are inputs as shown in Figure 5-1. All the internal peripheral modules will be reset by the internal reset signal (RST). Refer to Figure 5-2 for reset timing detail. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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