HC705RC17GRSSLASHD datasheet(34/126 Pages) NXP

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Central Processor Unit (CPU)

General Release Specification

MC68HC705RC17 — Rev. 2.0

Central Processor Unit (CPU)

Negative (N)

When set, this bit indicates that the result of the last arithmetic, logical,

or data manipulation was negative.

Zero (Z)

When set, this bit indicates that the result of the last arithmetic, logical,

or data manipulation was zero.

Carry/Borrow (C)

When set, this bit indicates that a carry or borrow out of the arithmetic

logical unit (ALU) occurred during the last arithmetic operation. This bit

is also affected during bit test and branch instructions and during shifts

and rotates.

3.7 Stack Pointer

The stack pointer (SP) contains the address of the next free location on

the stack. During an MCU reset or the reset stack pointer (RSP)

instruction, the stack pointer is set to location $00FF. The stack pointer

is then decremented as data is pushed onto the stack and incremented

as data is pulled from the stack.

When accessing memory, the eight most significant bits are permanently

set to 00000011. These eight bits are appended to the six least

significant register bits to produce an address within the range of $00FF

to $00C0. Subroutines and interrupts may use up to 64 (decimal)

locations. If 64 locations are exceeded, the stack pointer wraps around

and loses the previously stored information. A subroutine call occupies

two locations on the stack; an interrupt uses five locations.

00000011

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705RC17GRS/D Datasheet(PDF) 34 Page - NXP Semiconductors