Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

HC705RC17GRS/D Datasheet(PDF) 94 Page - NXP Semiconductors

Part # HC705RC17GRS/D
Description  The MC68HC705RC17 is a general-purpose, low-cost addition to the M68HC05 Family of microcontroller units (MCUs) and is suitable for remote control applications.
PDF  126 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705RC17GRS/D Datasheet(HTML) 94 Page - NXP Semiconductors

Back Button HC705RC17GRS/D Datasheet HTML 90Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 91Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 92Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 93Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 94Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 95Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 96Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 97Page - NXP Semiconductors HC705RC17GRS/D Datasheet HTML 98Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 94 / 126 page
background image
EPROM
General Release Specification
MC68HC705RC17 — Rev. 3.0
EPROM
11.4.3 Mask Option Registers (MOR1 and MOR2)
The mask option registers contain programmable EPROM bits to control
mask options. The MOR register is latched at the end of reset and
refreshed periodically depending on how often the EPROM is read.
PBXPU — Port B Pullup (X is 7–0)
When set, the PBPU bit enables the pullup on the corresponding port
B pin. If the PBPU bit is cleared, the pullup devices are disabled. The
erased state of the PBPU bit is to be cleared, thereby disabling the
pullup devices.
NOTE:
The MOR registers are reset to zero during reset. This causes the port
B pullup devices to become inactive until reset is completed.
SECUR — SECURITY Enable
1 = This bit secures the EPROM by disabling a read of the EPROM
in all modes other than user. This bit also disables writes to the
MOR registers and the programming register.
0 = The EPROM can be read in all modes.
Address:
$3FF0
Bit 7
654321
Bit 0
Read:
SECUR
IRQ
STOP
COP
Write:
Reset:
00000000
= Unimplemented
Figure 11-5. Mask Option Register 1 (MOR1)
Address:
$3FF1
Bit 7
654321
Bit 0
Read:
PB7PU
PB6PU
PB5PU
PB4PU
PB3PU
PB2PU
PB1PU
PB0PU
Write:
Reset:
00000000
Figure 11-6. Mask Option Register 2 (MOR2)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com