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HC705CT4GRS/D Datasheet(PDF) 95 Page - NXP Semiconductors |
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HC705CT4GRS/D Datasheet(HTML) 95 Page - NXP Semiconductors |
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95 / 152 page  Pulse Width Modulator (PWM) Functional Description MC68HC705CT4 — Rev. 2.0 General Release Specification MOTOROLA Pulse Width Modulator (PWM) 95 12.3 Functional Description A $00 in the PWM data register yields an off output (0%), but a $3F yields a duty of 63/64 (98.4%). When not in use, the PWM system can be shut off to save power by clearing the PWME bit in MISCR. Writes to the PWM data register can be performed at any time without affecting the current PWM output signal. Updates on the PWM output occur at the end of the PWM period (E x 64). At this time, the new value is loaded into the PWM data register. If a write to the registers is performed while the PWM is disabled, data is transferred directly to the PWM register. A read of the data register reads the active count in progress, not the buffered value. After the PWM is enabled (PWM = 1) the PWM output remains low for one E cycle. This allows synchronization and will not occur again until the next time the PWM is enabled. Figure 12-2. PWM Waveforms 10 3F 20 64 x E 0 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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