HC705CT4GRSSLASHD datasheet(112/152 Pages) NXP

112 / 152 page

EPROM

General Release Specification

MC68HC705CT4 — Rev. 2.0

112

EPROM

MOTOROLA

15.4.2 Programming Register

This register is used to program the EPROM array. Only the LATCH and

EPGM bits are available in user mode. To program a byte of EPROM,

set LATCH, write data to the desired address, and then set EPGM for

tEPGM. EPTST, MBE, TS1, and TS0 are available only in the special

modes, boot and test.

MORON — MOR On

READ: Only in special modes, user mode returns a logic 0

WRITE: Only in special modes

1 = Enables the decode to the MOR register latch. This feature

makes production testing and emulation easier. It is only valid

when IOOFF is cleared to zero.

0 = The MOR register is not in the map; INTSELB is not pulled at

$1F00.

EPTST — EPROM Test Mode Enable

READ: Only in special modes, user mode returns a logic 0

WRITE: Only in special modes

1 = Enables the functions of TS1 and TS0.

0 = TS1 and TS0 functions are disabled.

Address:

$0011

Bit 7

654321

Bit 0

Read:

MORON

EPTST

MBE

TS1

TS0

LATCH

EPGM

Write:

Reset:

00000000

Figure 15-4. Programing Register (PROG)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705CT4GRS/D Datasheet(PDF) 112 Page - NXP Semiconductors

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