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MSP430F14X Datasheet(PDF) 28 Page - Texas Instruments

Part # MSP430F14X
Description  MSP430F14x, MSP430F14x1, MSP430F13x Mixed-Signal Microcontrollers
PDF  83 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430F14X Datasheet(HTML) 28 Page - Texas Instruments

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1 µF
0
1 ms
10 ms
100 ms
t
. Setting Time
REFON
t
≈ 0.66 × C
[ms], with C
in µF
REFON
VREF+
VREF+
100 µF
10 µF
28
MSP430F149, MSP430F148, MSP430F147
MSP430F1491, MSP430F1481, MSP430F1471
MSP430F135, MSP430F133
SLAS272H – JULY 2000 – REVISED MAY 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: MSP430F149 MSP430F148 MSP430F147 MSP430F1491 MSP430F1481 MSP430F1471
MSP430F135 MSP430F133
Specifications
Copyright © 2000–2018, Texas Instruments Incorporated
(1)
Not production tested, limits characterized
(2)
Not production tested, limits verified by design
(3)
The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses two
capacitors between pins VREF+ and AVSS and VREF−/VeREF− and AVSS: 10-µF tantalum and 100-nF ceramic.
(4)
The condition is that the error in a conversion started after tREFON is less than ±0.5 LSB. The settling time depends on the external
capacitive load.
5.25 12-Bit ADC, Built-In Reference
over recommended operating supply voltage and free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VREF+
Positive built-in reference
voltage output
REF2_5V = 1 for 2.5 V,
IVREF+ ≤ IVREF+(max)
3 V
2.4
2.5
2.6
V
REF2_5V = 0 for 1.5 V,
IVREF+ ≤ IVREF+(max)
2.2 V, 3 V
1.44
1.5
1.56
AVCC(min)
AVCC minimum voltage,
positive built-in reference
active
REF2_5V = 0, IVREF+ ≤ 1 mA
2.2
V
REF2_5V = 1, IVREF+ ≤ 0.5 mA
VREF+ + 0.15
REF2_5V = 1, IVREF+ ≤ 1 mA
VREF+ + 0.15
IVREF+
Load current out of VREF+
terminal
2.2 V
0.01
–0.5
mA
3 V
–1
IL(VREF)+
Load-current regulation, VREF+
terminal(1)
IVREF+ = 500 µA ±100 µA,
Analog input voltage
≈ 0.75 V,
REF2_5V = 0
2.2 V
±2
LSB
3 V
±2
IVREF+ = 500 µA ±100 µA,
Analog input voltage
≈ 1.25 V,
REF2_5V = 1
3 V
±2
LSB
IDL(VREF)+
Load-current regulation,
VREF+ terminal(2)
IVREF+ = 100 µA to 90 µA,
CVREF+ = 5 µF, VAx ≈ 0 5 × VREF+,
Error of conversion result
≤ 1 LSB
3 V
20
ns
CVREF+
Capacitance at VREF+
terminal(3)
REFON = 1,
0 mA
≤ IVREF+ ≤ IVREF+(max)
2.2 V, 3 V
5
10
µF
TREF+
Temperature coefficient of
built-in reference(1)
IVREF+ is constant in the range of
0 mA
≤ IVREF+ ≤ 1 mA
2.2 V, 3 V
±100 ppm/°C
tREFON
Settling time of reference
voltage(4)(1) (see Figure 5-13)
IVREF+ = 0.5 mA, CVREF+ = 10 µF,
VVREF+ = 1.5 V, VAVCC = 2.2 V
17
ms
Figure 5-13. Typical Settling Time of Internal Reference (tREFON) vs External Capacitor on VREF+



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