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MSP430F14X Datasheet(PDF) 14 Page - Texas Instruments

Part # MSP430F14X
Description  MSP430F14x, MSP430F14x1, MSP430F13x Mixed-Signal Microcontrollers
PDF  83 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430F14X Datasheet(HTML) 14 Page - Texas Instruments

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MSP430F149, MSP430F148, MSP430F147
MSP430F1491, MSP430F1481, MSP430F1471
MSP430F135, MSP430F133
SLAS272H – JULY 2000 – REVISED MAY 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: MSP430F149 MSP430F148 MSP430F147 MSP430F1491 MSP430F1481 MSP430F1471
MSP430F135 MSP430F133
Terminal Configuration and Functions
Copyright © 2000–2018, Texas Instruments Incorporated
Table 4-2. Signal Descriptions for MSP430F14x1 (continued)
SIGNAL NAME
PIN NO.
I/O
DESCRIPTION
P3.6/UTXD1
34
I/O
General-purpose digital I/O pin
Transmit data out for USART1 in UART mode
P3.7/URXD1
35
I/O
General-purpose digital I/O pin
Receive data in for USART1 in UART mode
P4.0/TB0
.36
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI0A or CCI0B input, compare: Out0 output
P4.1/TB1
37
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI1A or CCI1B input, compare: Out1 output
P4.2/TB2
38
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI2A or CCI2B input, compare: Out2 output
P4.3/TB3
39
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI3A or CCI3B input, compare: Out3 output
P4.4/TB4
40
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI4A or CCI4B input, compare: Out4 output
P4.5/TB5
41
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI5A or CCI5B input, compare: Out5 output
P4.6/TB6
42
I/O
General-purpose digital I/O pin
Timer_B, capture: CCI6A or CCI6B input, compare: Out6 output
P4.7/TBCLK
43
I/O
General-purpose digital I/O pin
Timer_B, clock signal TBCLK input
P5.0/STE1
44
I/O
General-purpose digital I/O pin
Slave transmit enable for USART1 in SPI mode
P5.1/SIMO1
45
I/O
General-purpose digital I/O pin
Slave in/master out of USART1 in SPI mode
P5.2/SOMI1
46
I/O
General-purpose digital I/O pin
Slave out/master in of USART1 in SPI mode
P5.3/UCLK1
47
I/O
General-purpose digital I/O pin
USART1 clock: external input in UART or SPI mode, output in SPI mode
P5.4/MCLK
48
I/O
General-purpose digital I/O pin
Main system clock MCLK output
P5.5/SMCLK
49
I/O
General-purpose digital I/O pin
Submain system clock SMCLK output
P5.6/ACLK
50
I/O
General-purpose digital I/O pin
Auxiliary clock ACLK output
P5.7/TBOUTH
51
I/O
General-purpose digital I/O pin
Switch all PWM digital output ports to high impedance for Timer_B7 (TB0 to TB6)
P6.0
59
I/O
General-purpose digital I/O pin
P6.1
60
I/O
General-purpose digital I/O pin
P6.2
61
I/O
General-purpose digital I/O pin
P6.3
2
I/O
General-purpose digital I/O pin
P6.4
3
I/O
General-purpose digital I/O pin
P6.5
4
I/O
General-purpose digital I/O pin
P6.6
5
I/O
General-purpose digital I/O pin
P6.7
6
I/O
General-purpose digital I/O pin
RST/NMI
58
I
Reset input
Nonmaskable interrupt input port
Bootloader start
TCK
57
I
Test clock, the clock input port for device programming test and bootloader start
TDI/TCLK
55
I
Test data input or test clock input. The device protection fuse is connected to
TDI/TCLK.
TDO/TDI
54
I/O
Test data output or programming data input
TMS
56
I
Test mode select, used as an input port for device programming and test
DVSS
10
I
Connect to DVSS
Reserved
7
Reserved, do not connect externally



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