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DSP56374UM/D Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

Part # DSP56374UM/D
Description  a high-density CMOS device
PDF  64 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56374UM/D Datasheet(HTML) 29 Page - Freescale Semiconductor, Inc

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AC Electrical Characteristics
DSP56374 Data Sheet, Rev. 4.2
Freescale Semiconductor
29
9
AC Electrical Characteristics
The timing waveforms shown in the AC electrical characteristics section are tested with a VIL maximum
of 0.8 V and a VIH minimum of 2.0 V for all pins. AC timing specifications, which are referenced to a
device input signal, are measured in production with respect to the 50% point of the respective input
signal’s transition. DSP56374 output levels are measured with the production test machine VOL and VOH
reference levels set at 1.0 V and 1.8 V, respectively.
10
Internal Clocks
11
External Clock Operation
The DSP56374 system clock is derived from the on-chip oscillator or is externally supplied. To use the
on-chip oscillator, connect a crystal and associated resistor/capacitor components to EXTAL and XTAL;
an example is shown below.
Table 18. INTERNAL CLOCKS1
No.
Characteristics
Symbol
Min
Typ
Max
Unit
Condition
1
Comparison Frequency
Fref
5
—
20
MHz
Fref = FIN/NR
2
Input Clock Frequency
FIN
Fref*NR
NR is input divider value
3
Output clock Frequency (with
PLL enabled)2,3
FOUT
Tc
75
13.3
(Ef
× MF x FM)/
(PDF
× DF x OD)
150
MHz
ns
FOUT=FVCO/NO where
NO is output divider value
4
Output clock Frequency (with
PLL disabled)2,3
FOUT
—
Ef
150
MHz
—
5
Duty Cycle
—
40
50
60
%
FVCO=300MHz~600MHz
Note:
1 See users manual for definition.
2 DF = Division Factor
Ef = External Frequency
Mf = Multiplication Factor
PDF = Predivision Factor
FM= Frequency Multiplier
OD = Output Divider
Tc = Internal Clock Period
3 Maximum frequency will vary depending on the ordered part number.



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