DSP56374UMSLASHD datasheet(12/64 Pages) FREESCALE

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DSP56374 Data Sheet, Rev. 4.2

Signal Groupings

Freescale Semiconductor

4.7

Enhanced Serial Audio Interface

Table 10. Enhanced Serial Audio Interface Signals

Signal Name

Signal Type

State during

Reset

Signal Description

HCKR

Input or output

GPIO

disconnected

High Frequency Clock for Receiver—When programmed

as an input, this signal provides a high frequency clock

source for the ESAI receiver as an alternate to the DSP

core clock. When programmed as an output, this signal can

serve as a high-frequency sample clock (e.g., for external

digital to analog converters [DACs]) or as an additional

system clock.

PC2

Input, output, or

disconnected

Port C2—When the ESAI is configured as GPIO, this signal

is individually programmable as input, output, or internally

disconnected.

The default state after reset is GPIO disconnected.

This pin has an internal pull up resistor.

This input is 5 V tolerant.

HCKT

Input or output

GPIO

disconnected

High Frequency Clock for Transmitter—When programmed

as an input, this signal provides a high frequency clock

source for the ESAI transmitter as an alternate to the DSP

core clock. When programmed as an output, this signal can

serve as a high frequency sample clock (e.g., for external

DACs) or as an additional system clock.

PC5

Input, output, or

disconnected

Port C5—When the ESAI is configured as GPIO, this signal

is individually programmable as input, output, or internally

disconnected.

The default state after reset is GPIO disconnected.

This pin has an internal pull up resistor.

This input is 5 V tolerant.

DSP56374UM/D Datasheet(PDF) 12 Page - Freescale Semiconductor, Inc

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