TDA8006HSLASHC2 datasheet(9/40 Pages) PHILIPS

9 / 40 page

2000 Feb 21

Philips Semiconductors

Product speciﬁcation

Multiprotocol IC Card coupler

TDA8006

FUNCTIONAL DESCRIPTION

Microcontroller

The microcontroller is an 80C52 with 16 kbytes of ROM,

256 byte RAM, timers 0, 1, 2 , and 5 I/O ports (port P0:

open-drain; ports P1 to P3: weak pull-up). Port P4 is

identical to 83CE560, except that precharge circuits

ensure fast rise times at end of read mode (transition times

<0.5

µs). The ROM code content can be tested by

signature to avoid reading it out after masking; for security

bit option, see Table 12. The CPU, timers 0 and 1, serial

UART, parallel I/O ports, 256 byte RAM, 16 kbyte ROM

and external bus are conventional C51 family library

elements. Timer 2 is a conventional C52 element

(interrupt enable bit ET2: bit 3 in register IEN1 at byte

address E8H and interrupt priority bit PT2: bit 3 in register

IP1 at byte address F8H.

(reduced Radio Frequency Interference bit). When set to

logic 1, pin ALE cannot be toggled. ALE clears on RESET.

If access is required to the external data memory via

MOVX instructions (see Table 1), set bit PCON.6 = ARD in

the PCON register to logic 1.

For further information, please refer to the published

specification of the 83CE560 in

“Data Handbook IC20;

80C51-Based 8-Bit Microcontrollers”.

Ports P40 to P47, INT0 and P12 to P17 are used internally

for controlling the smart card interface and the other

peripherals. Ports P34 and P35 are used to control the

auxiliary contacts C4 and C8.

The list of differences given in Table 1 may help the

software developer of the dedicated emulation board for

the TDA8006 or other devices.

Table 1

List of differences between TDA8006, CE560, CL580 and C52

FEATURES

TDA8006

83CE560

CL580

INTEL C52

P4 address

Timer 2

Intel

Philips

Intel

ROM size

16 kbytes

64 kbytes

6 kbytes

8 kbytes

External 0 interrupt vector

0003H

External 0 interrupt priority highest (1st)

highest (1st)

Timer 0 interrupt vector

000BH

Timer 0 interrupt priority

2nd

4th

2nd

External 1 interrupt vector

0013H

External 1 interrupt priority 3th

3th

7th

3th

Timer 1 interrupt vector

001BH

Timer 1 interrupt priority

4th

10th

4th

Serial 0 interrupt vector

0023H

Serial 0 interrupt priority

5th

13th

5th

Timer 2 interrupt vector

004BH

0033H, etc. (8)

0033H

002BH

Timer 2 interrupt priority

lowest (6th)

miscellaneous

5th

lowest (6th)

I2C-bus

yes

ADC

yes

32 kHz oscillator

yes

PWM

yes

Watchdog

yes

Interrupts on P1

yes

Additional RAM

1 kbyte peripheral

2 kbyte MOVX

Wake-up from

power-down mode

reset, INT0, INT1

reset, INT0,

INT1 + other

reset, INT2 to INT8

reset

TDA8006H/C2 Datasheet(PDF) 9 Page - NXP Semiconductors

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