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MFS2400AVBA0ES Datasheet(PDF) 70 Page - NXP Semiconductors

Part # MFS2400AVBA0ES
Description  Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
PDF  151 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2400AVBA0ES Datasheet(HTML) 70 Page - NXP Semiconductors

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NXP Semiconductors
FS2400
Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
The fault error counter has two output values: intermediate and final. The intermediate value can be used
to force LIMP0 activation or generate a RSTB pulse according to the FLT_MID_RSTB/LIMP0_IMPACT bits
configuration (INIT phase).
FLT_MID_RSTB/LIMP0_IMPACT
Intermediate value impact on RSTB/LIMP0
0
No effect on the pin
1 (default)
The pin RSTB/LIMP0 is asserted
Reset condition
POR
Table 43. Fault error counter fail-safe impact
aaa-046860
FAULT_ERR_CNT_LIMIT = 01
1
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
0
FLT_ERR_CNT INIT
2
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
3
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
4
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
5
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
6
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
FAULT_ERR_CNT_LIMIT = 00
1
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
0
FLT_ERR_CNT INIT
2
INCR
WD_RFR_CNT = WD_RFR_CNT_LIMIT
+ WD Refresh OK
Figure 43. Fault error counter diagram with maximum value = 2 or 6
FS2400
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 4 — 23 October 2024
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