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DIGITAL INTERFACE

ADDRESS BYTE

I CWrite-AddressingByte

AD1

AD0

I CRead-AddressingByte

AD1

S/Sr

AD0

STARTor

RepeatedSTART

ACK

S/Sr

STARTor

RepeatedSTART

ACK

FromMastertoSlave

A=Acknowledge(SDALOW)

S=STARTCondition

Sr=RepeatedSTARTCondition

FromSlavetoMaster

CONTROL BYTE

TSC2004

SBAS408E – JUNE 2007 – REVISED MARCH 2008

The TSC2004 has a 7-bit slave address word. The first five bits (MSBs) of the slave address are factory-preset to

comply with the I2C standard for A/D converters and are always set at '10010'. The logic state of the address

input pins (AD1-AD0) determine the two LSBs of the device address to activate communication. Therefore, a

maximum of four devices with the same preset code can be connected on the same bus at one time.

The AD1-AD0 address inputs are only read during a power-up of the device, and should be connected to a digital

supply (I/OVDD), or digital ground (DGND). The slave address is latched into the TSC2004 on the falling edge of

SCL after the read/write bit has been received by the slave.

The last bit of the address byte (R/W) defines the operation to be performed. When set to a '1', a read operation

is selected; when set to a ‘0’, a write operation is selected. Following the START condition, the TSC2004

monitors the SDA bus, checking the device type identifier being transmitted. Upon receiving the '10010' code, the

appropriate device select bits, and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.

Table 4. I2C Slave Address Byte

MSB

LSB

AD1

AD0

R/W

Bit D0: R/W

1: I2C master read from TSC (I2C read addressing).

0: I2C master write to TSC (I2C write addressing).

Figure 34. I2C Bus Addressing (Slave Address Byte Format)

Table 5. Control Byte Format:

Start a Conversion and Mode Setting

MSB

LSB

SWRST

STS

(Control Byte 1)

Reserved

PND0

R/W

(Control Byte 0)

(Write '0')

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