TSC2004 datasheet(34/62 Pages) TI2

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TSC2004

SBAS408E – JUNE 2007 – REVISED MARCH 2008

CL1, CL0—Conversion clock control. These two bits specify the clock rate that the A/D converter uses to

perform conversion, as shown in Table 15.

Table 15. A/D Converter Conversion Clock Control

CL1

CL0

FUNCTION

fADC = fOSC/1. This is referred to as the 4MHz A/D converter clock rate, 10-bit resolution only

(1).

fADC = fOSC/2. This is referred to as the 2MHz A/D converter clock rate.

fADC = fOSC/4. This is referred to as the 1MHz A/D converter clock rate.

(1)

For SNSVDD = 1.2V at –40

°C, a lower A/D converter clock rate should be used to allow enough time for conversion settling.

PV2-PV0—Panel voltage stabilization time control. These bits specify a delay time from the moment the touch

screen drivers are enabled to the time the voltage is sampled and a conversion is started. These bits allow the

user to adjust the appropriate settling time for the touch panel and external capacitances. See Table 16 for

settings of these bits. The default state is 000, indicating a 0

µs stabilization time. These bits are the same

whether reading or writing.

Table 16. Panel Voltage Stabilization Time Control

PV2

PV1

PV0

STABILIZATION TIME (tPVS)

µs

100

µs

500

µs

1ms

5ms

10ms

50ms

100ms

PR2-PR0—Precharge time selection. These bits set the amount of time allowed for precharging any pin

capacitance on the touch screen prior to sensing if a pen touch is happening.

Table 17. Precharge Time Selection

PR2

PR1

PR0

PRECHARGE TIME(tPRE)

µs

276

µs

340

µs

1.044ms

1.108ms

1.300ms

1.364ms

SNS2-SNS0—Sense time selection. These bits set the amount of time the TSC2004 waits to sense whether the

screen is touched after converting a coordinate.

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