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R5F526TACDFM Datasheet(PDF) 83 Page - Renesas Technology Corp |
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R5F526TACDFM Datasheet(HTML) 83 Page - Renesas Technology Corp |
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83 / 142 page  R01DS0407EJ0120 Rev.1.20 Page 83 of 142 Oct 31, 2024 RX26T Group 2. Electrical Characteristics Figure 2.20 Output Disable Time for POE in Response to the Simultaneous Conduction of Output Pins Figure 2.21 Output Disable Time for POE in Response to Detection of the Comparator Outputs Figure 2.22 Output Disable Time for POE in Response to the Register Setting Figure 2.23 Output Disable Time for POE in Response to the Oscillation Stop Detection Outputs disabled Simultaneous active-level outputs detected*1 Note 1. When the active level is set to low. MTU PWM output pins GPTW PWM output pins tPOEDO COMPn level detection signal (n = 0 to 5) MTU PWM output pins GPTW PWM output pins Outputs disabled tPOEDC MTU PWM output pins GPTW PWM output pins Outputs disabled tPOEDS Corresponding bit in the SPOER register Oscillation stop detection signal (internal signal) MTU PWM output pins GPTW PWM output pins Outputs disabled tPOEDOS Main clock |
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