PSD511B1 datasheet(66/153 Pages) STMICROELECTRONICS

66 / 153 page

PSD5XX Family

General Description

The PSD5XX contains a powerful set of four 16 bit Counter/Timers, each controlled by

either PPLD outputs, external pins or Software. The Counter/Timers aid the user in

counting external events and/or generating accurate delays. These can be operated

as Counters or Timers. In Event-count, time capture and WatchDog modes, the

Counter/Timers work as Counters, whereas in Waveform and Pulse modes they work as

Timers. All Counter/Timers are capable of generating interrupts through the On-Board

Interrupt Controller. Each of the Counter/Timers consist of a Counter/Timer Command

share a Global command register, a Software Load/Store register, a Freeze command

All Counter/Timers share a common clock input and Delay Cycle register used in scaling

down the input clock to the Counter/Timer. The maximum resolution of the Counter/Timer

is the input clock of the PSD5XX divided by four. The maximum input clock frequency to

the PSD5XX is 30 MHz. Figures 31 and 32 describe the general features of the

Counter/Timers.

Features

t Four 16 bit Counter/Timers.

t Five modes of operation

– Waveform Mode

– Pulse Mode

– Event Counter Mode

– Time Capture Mode

– WatchDog Mode*

t Each Counter/Timer can be controlled by an input pin, dedicated PPLD macrocell or

software.

t Each Counter/Timer has an output to the Interrupt Controller.

t The WatchDog output is routed through the PLD and can be programmed to be

output at any PLD output pin.

t Programmable input and output polarity.

t Counter/Timer can be programmed as UP or DOWN Counter, except in

WatchDog mode.

t All Counters have the operating frequency range of DC to 7.0 MHz

(i.e 143 ns maximum resolution at 7.0 MHz). Higher resolution can be achieved

by using in conjunction with the GPLD macrocells.

t High resolution Divisor unit for Counter clocking purposes.

t Can easily interface with any 8 or 16 bit Microcontroller or Microprocessor.

See Process Change Notice related to Event Count Mode on page 148.

9.6

PSD5XX

Counter/Timer

(*) Counter/Timer-2 can operate in WatchDog mode.

PSD511B1 Datasheet(PDF) 66 Page - STMicroelectronics