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PSD511B1 Datasheet(PDF) 51 Page - STMicroelectronics |
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PSD511B1 Datasheet(HTML) 51 Page - STMicroelectronics |
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51 / 153 page ![]() PSD5XX Family 48 9.3.13 Port C and Port D – Functionality and Structure Port C and D are identical in function and structure and each can be configured to perform one or more of the following operating modes: t Standard MCU I/O Mode t PLD Input – direct input to ZPLD t Address Out – latched address outputs – Port C: A[0-7] are asigned to pins PC[0-7] – Port D: A[0-7] for 8-bit multiplexed bus, or A[8-15] for 16-bit multiplexed bus are assigned to pins PD[0-7] t Data Port – Port C: D[0-7] for 8-bit non-multiplexed bus – Port D: D[8-15] for 16-bit non-multiplexed bus t Open Drain – select CMOS or Open Drain driver Figures 23 and 24 show the structure of a Port C or D pin. If the pin is configured as output port, the multiplexer selects one of the two inputs as output. If the pin is configured as input, the input connects to : t Data In Register as input in the Standard MCU I/O Mode or t ZPLD input 9.3.14 Port E – Functionality and Structure Port E can be configured to perform one or more of the following functions: t Standard MCU I/O Mode t PLD I/O t Address Out – latched address lines A[0-7] are assigned to pins PE[0-7]. t Special Function Out – in this mode, Port E pin is configured as an output port for the following signals: PE2 – INTERRUPT – interrupt output from Interrupt Controller PE4 – Terminal Count output, Timer0 PE5 – Terminal Count output, Timer1 PE6 – Terminal Count output, Timer2 PE7 – Terminal Count output, Timer3 t Alternate Function In – in this mode, the inputs to Port E pins are: PE0 – BHE/ or PSEN/ or WRH/ or UDS/ or SIZ0 PE1 – ALE PE3 – TIMER0-IN :load/store/enable/ disable input to Timer 0 PE4 – TIMER1-IN :load/store/enable/disable input to Timer 1 PE5 – TIMER2-IN :load/store/enable/disable input to Timer 2 PE6 – TIMER3-IN :load/store/enable/disable input to Timer 3 PE7 – APD CLK :clock input for Automatic Power Down Counter Figure 25 shows the structure of a Port E pin. The Control Logic block selects one of four sources through the multiplexer for pin output. If the pin is configured as input, the input goes to: t Data In Register as input in Standard MCU I/O Mode or t PE Macrocell as PLD input or t Alternate Function In I/O Ports (Cont.) |
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